Innovative protection schemes through hardware-in-the-loop dynamic testing

Alasali, F ORCID: https://orcid.org/0000-0002-1413-059X, El-Naily, N, Mustafa, HY ORCID: https://orcid.org/0009-0005-3059-1379, Loukil, H ORCID: https://orcid.org/0000-0002-2028-3517, Saad, SM ORCID: https://orcid.org/0000-0002-8867-0521, Saidi, AS ORCID: https://orcid.org/0000-0003-1725-2418 and Holderbaum, W ORCID: https://orcid.org/0000-0002-1677-9624 (2024) Innovative protection schemes through hardware-in-the-loop dynamic testing. Computers and Electrical Engineering, 119 (Part B). 109559. ISSN 0045-7906

Preview

Published Version Available under License Creative Commons Attribution. Download (16MB) | Preview

Abstract

In microgrid environments, the behaviour of Distributed Generation (DG) during fault conditions varies significantly based on DG types and penetration levels. Conventional Overcurrent Relays (OCRs) with standard time-current characteristics may exhibit limitations during excessive fault scenarios, leading to OCR operating delays and mis-coordination within the microgrid. This study proposes a novel constraint on the maximum Current Multiplier Setting (CMS) and utilizes Water Cycle Algorithm (WCA) and Particle Swarm Optimization (PSO) techniques to optimize the Time Multiplier Setting (TMS). Comparative dynamic analysis through real-time validation shows that the non-standard OCR approach outperforms the standard IEC scheme across all grid operation modes with different type, size and location of DGs. For instance, under F1 conditions, the tripping time of OCR1 was reduced from 0.0226 seconds (IEC) to 0.000981 seconds (non-standard). HIL results further affirm the efficacy of the proposed scheme. The optimization process, implemented in MATLAB and validated using ATP/EMTP simulations and SIPROTEC 7SJ62 relays, demonstrates enhanced microgrid protection coordination, improving system reliability and performance.