e-space
Manchester Metropolitan University's Research Repository

Correction of geometric image distortion using FPGAs

Eadie, David and Shevlin, Fergal P. and Nisbet, Andy (2003) Correction of geometric image distortion using FPGAs. [Conference or Workshop Item]

Full text not available from this repository.

Abstract

Many image processing systems have real-time performance constraints. Systems implemented on general purpose processors maximize performance by keeping busy the small fixed number of available functional units such as adders and multipliers. In this paper we investigate the use of programmable logic devices to accelerate the execution of an application. Field Programmable Gate Arrays (FPGAs) can be programmed to generate application specific logic that alters the balance and type(s) of functional units to match application characteristics. In this paper we introduce a correction of geometric image distortion application. Real number support is a requirement in most image processing applications. We examine the suitability of fixed point, floating-point and logarithmic number systems for an FPGA implementation of this image processing application. Performance results are presented in terms of: (1) execution time, and (2) FPGA logic resource requirements.

Impact and Reach

Statistics

Downloads
Activity Overview
0Downloads
219Hits

Additional statistics for this dataset are available via IRStats2.

Altmetric

Actions (login required)

View Item View Item