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    Classification of compiler optimizations for high performance, small area and low power in FPGAs

    Özer, Emre, Nisbet, Andy and Gregg, David (2003) Classification of compiler optimizations for high performance, small area and low power in FPGAs. UNSPECIFIED. Department of Computer Science, Trinity College, Dublin.

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    Abstract

    We propose a classification of high and low-level compiler optimizations to reduce the clock period, power consumption and area requirements in Field-programmable Gate Array (FPGA) architectures. The potential of each optimization, its effect on clock period, power and area and machine dependency is explained in detail.

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